H466 Paper 1 Revision

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Shahbaz Farooq

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10 Slides • 86 Questions

H446 Paper 1 Revision

By Shahbaz Farooq

Networking:

(b) The internet structure: • The TCP/IP Stack

Some text here about the topic of discussion

Multiple Choice

What does TCP stand for?

Transfer Control Protocol

Transmission Control Protocol

Transfer Character Protocol

Transmission Character Protocol

Multiple Choice

What is not incuded in a packet?

Sender IP address

Checksum

Router ID

Packet number

Multiple Choice

Which protocol is used to send packets

FTP

SMTP

TCP

Multiple Choice

What is name of the protocol that matches domain names to IP addresses?

SMTP

TCP

DNS

Multiple Choice

What kind of address is made up of hex pairs and stored on each device's NIC?

MAC

TCP

DNS

Multiple Choice

Which of the TCP/IP model layers is responsible for breaking down the message into packets?

Network

Application

Transport

Internet

Multiple Choice

What is a protocol?

Any peripheral device

A person that uses a client

Rules for networks and communications

A circuitboard with the components to send/receive data

General Knowledge Round CPU

Multiple Choice

An object that has more than one form is referred to as...

Inheritance

Interface

Abstract

Polymorphism

Multiple Choice

Von Neumann advantage...

Only one data bus so less complex for the control unit to manage

The separation of data and instructions and two buses means that processes can be carried out in parallel.

Multiple Choice

Harvard disadvantage..

This architecture can only process one instruction / item of data at a time.

More complex architecture and so is more expensive and takes longer to manufacture

Multiple Choice

This type of instruction set will have a large amount of known instructions (for example 80-100) and these will be complex in nature (i.e. each instruction may represent several steps)

CISC

RISC

Multiple Choice

RISC Processors This type of instruction set has a much smaller amount of known instructions (for example 30-40).

As a result, in RISC, more instructions are required to perform a task.

As a result, in RISC, less instructions are required to perform a task.

Multiple Choice

Parallel processing is...

is a single integrated circuit that contains multiple core processing units, more commonly known as cores.

a mode of operation in which a process is split into parts, which are executed simultaneously on different processors attached to the same computer.

Multiple Choice

All the instructions that any particular CPU can use are known as the

Instruction set

Keyword set

Word set

Character set

Multiple Choice

The Accumulator is a type of what?

Buffer

RAM

Cache

Multiple Choice

Clock speed is measured in

Hertz

Words

Bits Per Second

Metres Per Second

Multiple Choice

Von Neumann processors have seperate areas of memory for data and the programs that use them

True

False

Multiple Choice

What is the purpose of the Memory Data Register (MDR)?

Holds the location of where the data is to be stored / read from

Holds memory

Holds instructions

It does nothing

Multiple Choice

Translate Assembly Language code into Machine Code

Assembler

Compiler

Translator

Interpreter

Multiple Choice

Translate entire source code all in one go into Machine Code

Compiler

Assembler

Translator

Interpreter

Multiple Choice

Translate and execute source code –Line by Line, Statement by Statement.

Interpretor

Translator

Compiler

Assembler

Multiple Choice

Uses mnemonics

Interpreter

Translator

Compiler

Assembly Langauge

Multiple Choice

What is the purpose of the CPU's registers?

These are used to permanently store data and instructions

These are used to temporarily store data and instructions.

They are used to keep track of the CPU speed.

They are used to check the CPU's processing power

Multiple Choice

What is the purpose of the Program Counter (PC) register?

This is used to hold the instruction that needs to be carried out.

This is used to save information.

This is used to hold the location of the data.

This is used to store the memory address of the next instruction.

Multiple Choice

What is the Mnemonic code for the STORE instruction in LMC?

STO

LDA

STA

BRA

Multiple Choice

What does the BRA loop do in LMC?

This will keep looping the program until you stop it.

This will loop the program until a certain condition is met.

This will loop the program until the accumulator is 0.

This will loop the program until the accumulator is negative

Multiple Choice

What does the following instruction do in LMC:
A DAT 5

Creates a memory location called B

Creates a memory location labelled 5 which stores the letter A

Create a memory location labelled A which stores the number 5

Creates a memory location labelled C

Structure and function of the processor

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Open Ended

Explain the process of what happens within the CPU when the instruction STA 17 is executed (it has already been fetched and decoded). You can assume that the value held in the accumulator is 5. [6 marks]

Type response here

(c) Assembly language (including following and writing simple programs with the Little Man Computer instruction set).

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Fill in the Blanks

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Multiple Choice

Which of these is the correct way to store the value of the accumulator in box 20?

20 STA

20 STO

STA 20

STO 20

Open Ended

Write down what you think the following program will do:

INP

STA 50

INP

ADD 50

OUT

HLT

Type response here

Data Types :

(f) Convert positive integers between Binary Hexadecimal and denary

(g) Representation and normalisation of floating point numbers in binary

(j) How character sets (ASCII and UNICODE) are used to represent text

Some text here about the topic of discussion

Fill in the Blanks

Type answer...

Fill in the Blanks

Type answer...

Multiple Choice

Calculate the binary addition:
01100000
01101001
Use binary addition rules + whiteboards!

11001001

11101001

11001011

1010101111

Multiple Choice

Calculate the binary addition:
01101111
01101111
Use binary addition rules + whiteboards!

11011110

11011111

11111110

Multiple Choice

Calculate the binary addition:
00111011
00110011
Use binary addition rules + whiteboards!

01101111

01111110

01101110

11111110

Multiple Choice

1 1 0 1 1 - 1 0 1 1

11000

01010

11111

1 0 0 0 0

Multiple Choice

1011101 - 111100

100001

011110

111000

010110

Multiple Choice

In fixed-point binary representation, which of the following numbers represent 101000.011?

40.5

40.125

40.375

40.5625

Multiple Choice

What decimal number does this normalised floating-point binary represent?

Mantissa ----- Exponent

0 . 1 0 1 0 ----- 0 1 0

2.5

0.625

-2.5

10.25

(d) Translators: Interpreters, compilers and assemblers (e) Stages of compilation (lexical analysis, syntax analysis, code generation and optimisation)

Some text here about the topic of discussion

Multiple Select

Converts high-level code to low-level:

Interpreter

Compiler

Assembler

Multiple Select

Creates an executable file

Interpreter

Compiler

Assembler

Multiple Select

Must be installed for the code to run on another machine

Interpreter

Compiler

Assembler

Multiple Select

Converts low level code to machine code

Interpreter

Compiler

Assembler

Multiple Select

Provides quicker debugging

Interpreter

Compiler

Multiple Select

Does not provide the source code to the user

Interpreter

Compiler

Multiple Choice

The correct order of the stages of compilation is:

Lexical Analysis, Syntax Analysis, Code Generation, Code Optimisation

Lexical Analysis, Syntax Analysis, Code Optimisation, Code Generation

Syntax Analysis, Lexical Analysis, Code Optimisation, Code Generation

Syntax Analysis, Lexical Analysis, Code Generation, Code Optimisation

Multiple Choice

Removing whitespace is in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

Token creation is in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

Symbol table is created in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

The code is checked against the rules in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

The syntax tree is created in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

The user will first be alerted to errors found in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

The syntax tree is converted into object code in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

Redundant code is removed in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

The code is improved to run as fast as possible in:

Lexical Analysis

Syntax Analysis

Code Generation

Code Optimisation

Multiple Choice

At the linking stage...

Code from the linked library is copied into the program

Code from the linked library is removed from the program

(d) Scheduling: round robin, first come first served, multilevel feedback queues, shortest job first and shortest remaining time

Some text here about the topic of discussion

Multiple Choice

In this, the process that comes first will be executed first and next process starts only after the previous gets fully executed.

First-come, first-serve

Shortest-job-first scheduling

Round-robin scheduling

Priority scheduling

Multilevel Queue scheduling

Multiple Choice

This is scheduling policy that selects for execution the waiting process with the smallest execution time.

First-come, first-serve

Shortest-job first scheduling

Round-robin scheduling

Priority scheduling

Multilevel queue scheduling

Multiple Choice

It is a CPU Scheduling algorithm where each process is assigned a fixed time slot in a cyclic way.

First-come, first-serve

Shortest-job-first scheduling

Round-robin scheduling

Priority scheduling

Multilevel queue scheduling

Multiple Choice

Allocating time on the processor to individual processes is known as...

CPU Scheduling

CPU Timing

CPU Clocking

CPU Sorting

Multiple Choice

The problem with round robin, SJF and STR is what?

They don't take into account priority

They all take too long

Short jobs will not be completed

Multiple Choice

Which of these is NOT an aim of the CPU scheduler

To maximise CPU time

Process as many jobs as possible

To complete jobs in at least 30 seconds

Multiple Choice

Which of these is a benefit of FCFS

Simple to implement

It considers priority

Long jobs will get completed eventually

Multiple Choice

Which algorithm is being described.."Long jobs might never get completed as short processes will always ‘jump the queue"

Round robin

FCFS

STR

Multiple Choice

If a CPU has the following:

Process A = 3 cycles

Process B = 2 cycles

Process C = 5 cycles

Which would implement 'B' the quickest?

Round robin (1 cycle time slice)

FCFS

STR

H446 Paper 1 Revision

By Shahbaz Farooq

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