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MCES_M1_Test

Authored by Prof. Akhilesh Sathyanarayan

Professional Development

Professional Development

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MCES_M1_Test
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23 questions

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1.

DRAW QUESTION

3 mins • 5 pts

Represent a basic block diagram of CPSR mentioning all the different fields. You can use your fingers to draw a basic sketch.

Media Image

2.

MATCH QUESTION

1 min • 5 pts

Match the following

RISC

Less load on compiler

ES Hardware

Fastest memory units with very low capacity

CISC

ARM Core, Controller, Peripherals & Bus

Registers

More load on compiler

ES Software

OS, boot code, applications

3.

FILL IN THE BLANKS QUESTION

1 min • 1 pt

Size of general purpose registers in NXP LPC 2148?

(a)  

4.

FILL IN THE BLANKS QUESTION

45 sec • 1 pt

This memory unit is placed between main memory & the core to improve overall system performance.

(a)  

5.

MULTIPLE CHOICE QUESTION

30 sec • 1 pt

Which of these does not come under RISC design philosophy?

Reduced instructions

Pipeline

Load-store architecture

Aarmugam

6.

MULTIPLE SELECT QUESTION

45 sec • 2 pts

Select all the options that come under ARM design philosophy instruction set.

Variable cycle execution

Thumb state

Barrel shifter

Pipelining

7.

DRAG AND DROP QUESTION

1 min • 1 pt

Shrihari alias 'loose maada' can store a 32-bit hexadecimal number in some temporary storage. He calls his friend Jogi & asks for help. Jogi suggests him to use ​ (a)   for his operation. He also warns him not to use ​ (b)   for the storage. Using ​ (c)   mode, Srihari successfully completes his mission.

registers
special purpose registers
immediate addressing

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